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Joined: Sat Aug 25, 2007 5:01 pm Posts: 13 Location: Prague
Hans, why do you think Nehalem has only two channels for memory? These was some photo of Gigabyte's mobo for dual-socket Nehalem:
Notice 2x 6 DIMM slots. I can hardly imagine a memory controller that could handle 3 DIMM slots at current speeds. It much more looks like 3 channels (or 3 controllers if you like it that way) per CPU.
If Shanghai is that large, it will cause AMD big trouble. They could compete with Intel by price but not with this.
For whatever its worth, an Intel employee who posts under the handle dmens on anandtech forums commented that Hans was mistaken on his labeling the Nehalem die shown as having only 2-channel. This individual stated the die-shot Hans shows is in fact the die of the 3-channel Nehalem.
Hans, why do you think Nehalem has only two channels for memory? These was some photo of Gigabyte's mobo for dual-socket Nehalem:
For the time being I take the 3 channel DDR3 interface + 4 channel QPI to
be the (multi-die) socket limitation, with 2 channel DDR3 and 2 channel QPI
per QC Nehalem die.
There have been Nehalem die-plots with one and two rows of DDR3 I/O
cells, that's the reason why:
Older Intel slides talked about 4 channel DDR3 which might have been
before the LGA1366 package was frozen. This could have been for
instance 2 dies x 2 channels..
I am not sure if it is already know, cause the source is already one week old. In any case: according to an AMD interview published at the German PCGH magazine, 45nm CPUs will feature SSE5.
Yeah, because it's really that simple to add an unplanned 170 instructions to a CPU...
Without a direct quote from AMD, I'm still calling this an interpretation error.
That information is outdated, Bulldozer is delayed until 2010. Hence it makes sense to introduce SSE5 earlier with another core.
cheers
Opteron
it is BS anyway, can't be call SSE5 , because an instruction set SSEn has to be back compatible and include SSE(n-1)
The hyprocrathie started with SSE4a, it is use to be clear that they were doing something different, not trying to mislead the consumers, SSE/3DNow was clear. Now, they try to mislead the consumers and claim SSE4a , who has nothing to do with the awesome performance boost SSE4-MPSADBW can provide. Misleading the consumer in the shop is not a pretty business.
AMD SSE5 does not include SSE4, neither SSE4.1,SSE4.2
I am wondering when the press will call them on this shameless marketing.
Very soon, I will be launching SSE-V12 mega 5 of Death, and it will be targeted for 3D shooters ... kidding! come on!
nobody use 3DNow, not even now, not even before, not even in the futur, AMD SSE5 is going to follow the path, like the SSE4a of barcelona, not even one apps is supporting it.
the pre-requisit for calling an instruction set "n" is to include "n-1". When you get that low by ignoring the tradition of the industry, you probably have some serious concern about the real performance and you try to cover it with "a 6 dollars burger for 3.99$"
Who? Francois (designer of few SSEx intructions)
Important: this is my personal opinion, it engages only myself, my employer is not responsable for this posting, I may get my butt kicked Monday for "speaking my mind", but this one is too big. Misleading the consumers is not a good business to be in, and some people decided to go there, very sad. :roll:
@Bart:
Nobody said that the instructions are implemented by using the Direct Path decoder ... They could do it by using the Vector Path decoder. The 4 µRoms are not fully used, due to the fact that AMD uses the direct path decoder more often with the K10. Therefore I think that SSE5 is feasible with the 45nm K10 by using the Vector Path Decoder.
@who?:
Who cares about the name ... I dont, I just care about the performance benefit.
It is true that there must be application, compiler etc. support and that would not be easy to get if Intel's not using the new instructions.
But at least the HPC guys will be quite happy and AMD could also optimize their own ATi graphics drivers :)
@who?: Who cares about the name ... I dont, I just care about the performance benefit.
It is true that there must be application, compiler etc. support and that would not be easy to get if Intel's not using the new instructions.
Opteron
We got to think a little larger than our geeky world, people go in shop and buy product based on tradition of the industry, and not respecting the tradition and naming convention has serious concequences: The consumer buy something that is not what he think it is.
I am always very careful not to be misleading, and everybody in the industry should follow this rule.
The consumer cares about the names, this is how they choose the product. they buy processors with a list of features, and SSE5 imply it includes SSE4, this is like this for 10 years, this is implicit in the naming.
Some consumers may think they are getting faster motion estimation of SSE4-PMSADBW, but they will not ...
who? / Francois
Again, this is my personal opinion, and my employer is not responsable for this posting.
Are you telling me there are any non geeks that have any idea what SSEx is let alone, that buy a cpu to get faster "PMSADBW" ? Further more, what law says SSE5 must be 100% completely binary backwards compatible with SSE4/3/2/1 ? I'm not a fan of this naming mess either, but lets not be ridiculous here.
It is true that there must be application, compiler etc. support and that would not be easy to get if Intel's not using the new instructions.
We don't know what's happening behind the scenes. One can find
Microsoft confidential presentations which mention future microsoft
compiler support for SSE5 going back as far as 2004...
Are you telling me there are any non geeks that have any idea what SSEx is let alone, that buy a cpu to get faster "PMSADBW" ? Further more, what law says SSE5 must be 100% completely binary backwards compatible with SSE4/3/2/1 ? I'm not a fan of this naming mess either, but lets not be ridiculous here.
well, we ll see ... nothing ridiculous here. You are right, there is no law about this, but taking the consumers for idiots usually turns back on you, we will see what the consumer association will do then ... Usually, when they see a gold mine, they go for it.
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