Aceshardware

Del · Joined: 09 Aug 2007 Posts: 121

who? wrote:

If you could turn off the L1/L2 prefetcher, you would see serious slowdowns. The only one you can turn OFF is the CPU/Chipset one. so, the only one you can quantify is this one. Prefetcher benefits are bigger than you can measure.

This is what you said. Am I supposed to believe that what you really meant was that he could turn it off, but would need the source code or some binary hack to do it? I think you owe no@spam.com an apology, he just corrected yet another of your unfounded categorical statements. I am pretty sure it wasn't your acid humour this time either.

no@spam.com · Joined: 07 Oct 2007 Posts: 69

> Dude, read my title and give yourself 5 min of reflection, do you
> really think you can teach me anything about MSR?

Yes. My knowledge of them happens to both, be intimate (whereas
your's appears to be spotty, judging from your incorrect claim that
the L1/L2 prefetcher can't be disabled), and span multiple vendors
(whereas your's is likely limited to Intel MSRs).

You seem to be under the (false) impression that your are the only
one on this forum who helped/helps build x86 chips, or understands
their nitty gritty details.

> Those are not Bios options, are they? :)

They happen to be, on systems I deal with.

> So, you just have to try to do the experimentation ... try it :)

I did.

To nobody's surprise, the performance range of those 16 settings is
spanning >25%, and the ideal settings vary with the application. By
comparison, your competitor's products offered much more blended
performance, without a need for app-to-app settings.

> Do you think an IT guy will write a program turning it OFF?
> I don't think so (If you know a case, let me know).

Any MSR read/write utility will do the trick.

Under Linux you can "modprobe msr", followed by dev reads/writes.

Of course I should point out that Intel only guarantees the prefetcher
state changes while the caches are off, i.e. that's all they validate. So
far I don't know of anyone who has seen problems switching them on
the fly, though.

Oh and in case you guys do actually care about feedback (which your
postings don't really suggest, btw) -- moving those 4 prefetcher bits in
Nehalem seems stup^H^H^H^H like an unnecessary hurdle.

who? · Joined: 01 Sep 2007 Posts: 540

Del wrote:

who? wrote:

If you could turn off the L1/L2 prefetcher, you would see serious slowdowns. The only one you can turn OFF is the CPU/Chipset one. so, the only one you can quantify is this one. Prefetcher benefits are bigger than you can measure.

This is what you said. Am I supposed to believe that what you really meant was that he could turn it off, but would need the source code or some binary hack to do it? I think you owe no@spam.com an apology, he just corrected yet another of your unfounded categorical statements. I am pretty sure it wasn't your acid humour this time either.

Please take a desktop PC from Dell or HP running windows XP or vista and show me how to turn OFF the L1/L2 prefetcher without writing an application.
dudes, you are getting deeper in the corner case, as usual, you are really rackless when it gets to win a discussion...

so, now, we are down to using linux, write to MSRs, and on server ...
a 0.0000000001% market share corner case! nice!!!!

useless discussion. ok ok ok ! You are soooo right in this 0.0000000001% Market share case!

what ever dudes!

read the bible "stoning" episode, as usual, you find your inspiration there.

who? lol
(PS: Tonight, I will sleep good , because I say the opposite of the intel guy, I proved him wrong, he probably optimized DivX SSE4, Povray and many other applications by luck ... I am so much smarter than this guy ... I wonder why intel is using him ... lololol After all, i did not do that much myself .... lol, They call him the performance gurus, but he probably got this business card in "kinder Surprise")

haha

who? · Joined: 01 Sep 2007 Posts: 540

no@spam.com wrote:

> Dude, read my title and give yourself 5 min of reflection, do you
> really think you can teach me anything about MSR?

Yes. My knowledge of them happens to both, be intimate (whereas
your's appears to be spotty, judging from your incorrect claim that
the L1/L2 prefetcher can't be disabled), and span multiple vendors
(whereas your's is likely limited to Intel MSRs).

You seem to be under the (false) impression that your are the only
one on this forum who helped/helps build x86 chips, or understands
their nitty gritty details.

> Those are not Bios options, are they? :)

They happen to be, on systems I deal with.

> So, you just have to try to do the experimentation ... try it :)

I did.

To nobody's surprise, the performance range of those 16 settings is
spanning >25%, and the ideal settings vary with the application. By
comparison, your competitor's products offered much more blended
performance, without a need for app-to-app settings.

> Do you think an IT guy will write a program turning it OFF?
> I don't think so (If you know a case, let me know).

Any MSR read/write utility will do the trick.

Under Linux you can "modprobe msr", followed by dev reads/writes.

Of course I should point out that Intel only guarantees the prefetcher
state changes while the caches are off, i.e. that's all they validate. So
far I don't know of anyone who has seen problems switching them on
the fly, though.

Oh and in case you guys do actually care about feedback (which your
postings don't really suggest, btw) -- moving those 4 prefetcher bits in
Nehalem seems stup^H^H^H^H like an unnecessary hurdle.

It happen to be??? what system?

who?

Gabriele Svelto · Joined: 27 Jun 2007 Posts: 290 Location: Milano, Italy

who? wrote:

I wonder why intel is using him ...

Sometimes I really do.

who? · Joined: 01 Sep 2007 Posts: 540

Gabriele Svelto wrote:

who? wrote:

I wonder why intel is using him ...

Sometimes I really do.

may be you confuse "language skill" with "delivered goods" :)
On my track record, I have "Tejas to Conroe roadmap modif", Skulltrail, LDDQU, MPSADBW(with my buddies from SSG), I probably forget many ... what about you guys?

I have the feeling that I did pretty ok on those :), come on, give me some credit :)

who?

LiamC · Joined: 23 Jul 2007 Posts: 82

To change the tone and tack of this thread for a moment:.

This discussion of Core 2s/Nehalems hardware prefetcher's is interesting but it does raise some interesting questions:

Is this use (misuse) of bandwidth the reason Nehalem went to a three channel memory configuration?

If it is, and Nehalem needs the extra bandwidth, how will it perform on a two channel (volume seller) rig? I think that the three channel rig will be confined to the top-end, big bucks category that gets all the press, and has the least relevance wrt to systems sold.

EduardoS · Joined: 22 Mar 2008 Posts: 110

LiamC wrote:

If it is, and Nehalem needs the extra bandwidth, how will it perform on a two channel (volume seller) rig? I think that the three channel rig will be confined to the top-end, big bucks category that gets all the press, and has the least relevance wrt to systems sold.

And just curious, how interleaving will be done on three channel? Wich options it will have? Spare? Mirroring? Memory raid?

TacoBell · Joined: 17 Aug 2007 Posts: 287

Quote:

If it is, and Nehalem needs the extra bandwidth, how will it perform on a two channel (volume seller) rig?

With 2 channels it will have twice the (theoretical) BW of today's 1333 FSB Core 2s.

Paul DeMone · Joined: 29 Aug 2007 Posts: 530 Location: Great white north

no@spam.com wrote:

By
comparison, your competitor's products offered much more blended
performance, without a need for app-to-app settings.

LOL, that is one of the best spun ways of saying "mediocre" I have
seen in a while.

who? · Joined: 01 Sep 2007 Posts: 540

Paul DeMone wrote:

no@spam.com wrote:

By
comparison, your competitor's products offered much more blended
performance, without a need for app-to-app settings.

LOL, that is one of the best spun ways of saying "mediocre" I have
seen in a while.

Show me the blended performance!!!! SPEC_FP_RATE? lol ... Can t wait ... Simply Marvelous!!!

who?

jack · Joined: 27 Jun 2007 Posts: 359

Fuad is saying that there will be $284 Nehalem already in this year:
http://www.fudzilla.com/index.php?option=com_content&task=view&id=8580&Itemid=1

JumpingJack · Joined: 05 Oct 2007 Posts: 124

jack wrote:

Fuad is saying that there will be $284 Nehalem already in this year:
http://www.fudzilla.com/index.php?option=com_content&task=view&id=8580&Itemid=1

Perhaps sooner than we think:
http://www.digitimes.com/mobos/a20080724PD205.html

All rumor mill at this point.

who? · Joined: 01 Sep 2007 Posts: 540

lol