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Nehalem Preview
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Paranoid



Joined: 02 Aug 2007
Posts: 224

PostPosted: Thu Jun 05, 2008 12:32 pm    Post subject: Nehalem Preview Reply with quote

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Opteron



Joined: 16 Mar 2008
Posts: 55

PostPosted: Thu Jun 05, 2008 1:32 pm    Post subject: Re: Nehalem Preview Reply with quote

Especially the L3 is very good:
Quote:
The L3 cache is quite possibly the most impressive, requiring only 39 cycles to access at 2.66GHz. The L3 cache is a very large 8MB cache, 4x the size of Phenom's L3, yet it can be accessed much faster. In our testing we found that Phenom's L3 cache takes a similar 43 cycles to access but at much lower clock speeds (2.0GHz). If we put these numbers into relative terms it takes 21.5 ns to get a request back from Phenom's L3 vs. 14.6 ns with Nehalem's - that's nearly 50% longer in Phenom.
Wonder what AMD did with their L3 ... :(
I know, Intel is already using 45nm, but I doubt that Shanghai will do any miracles :(

cheers

Opteron
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Carfax



Joined: 07 Aug 2007
Posts: 40

PostPosted: Thu Jun 05, 2008 1:42 pm    Post subject: Reply with quote

Amazing! Intel is really upping the ante on CPU performance!

I'm not one of those early adopter types though, so I'll wait till Nehalem makes it to 32nm before I buy it.

For now, my 3.6ghz Yorkie will suffice.
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LiamC



Joined: 23 Jul 2007
Posts: 82

PostPosted: Thu Jun 05, 2008 1:48 pm    Post subject: Reply with quote

According to Charlie and others, AMD did not believe that Core 2 was as fast as it was appearing in early benchmark "leaks".

I hope it turned them into believers, and I hope that they have an answer.
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JoeP



Joined: 28 Jul 2007
Posts: 65

PostPosted: Thu Jun 05, 2008 2:51 pm    Post subject: Reply with quote

So long Hector and co. :(
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JumpingJack



Joined: 05 Oct 2007
Posts: 124

PostPosted: Thu Jun 05, 2008 6:02 pm    Post subject: Re: Nehalem Preview Reply with quote

Opteron wrote:
Wonder what AMD did with their L3 ... :(
I know, Intel is already using 45nm, but I doubt that Shanghai will do any miracles :(

cheers

Opteron


Superior process technology on Intel's side -- or inferior process tech on AMD's choose your poison.
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redpriest



Joined: 30 Aug 2007
Posts: 58

PostPosted: Thu Jun 05, 2008 6:19 pm    Post subject: Reply with quote

I don't see what the huge bugaboo about L3 performance is here. At comparable clock speeds the L3 latency will be the same - there is no difference.

For reference, L2 latency for Barcelona is 9 cycles for 512kb vice 11 cycles for Nehalem.

Nehalem is a multithread monster though, that's for sure.
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Paul DeMone



Joined: 29 Aug 2007
Posts: 530
Location: Great white north

PostPosted: Thu Jun 05, 2008 6:20 pm    Post subject: Reply with quote

LiamC wrote:
According to Charlie and others, AMD did not believe that Core 2 was as fast as it was appearing in early benchmark "leaks".

I hope it turned them into believers, and I hope that they have an answer.


AMD can always integrate memory controllers within the processor
like Intel did with Nehalem to grab that huge piece of low hanging
performance fruit. Oh wait, they drained that well five years ago
but still couldn't even keep up with the FSB based C2D family when
it appeared a few years ago. Luckily for AMD it saved up a big pile
of money it made when Opteron was hot to get them through the
multi year development cycle for a new microarchitecture. Oh wait,
they spent all that money and borrowed billions more to buy ATI.
Retreads and shrinks of the underwhelming K8L core as far as the
eye can see you say? You don't need a magic eight ball to predict
how this story ends.
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P-M



Joined: 06 Sep 2007
Posts: 79

PostPosted: Thu Jun 05, 2008 6:54 pm    Post subject: Looking back Reply with quote

Nehalem is about what the original K10 was to be, multi cored with smt and imc. OTH nehalem is wider like C2D is wider than K8. Might this be an important differentor between original K10 and nehalem?
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jack



Joined: 27 Jun 2007
Posts: 359

PostPosted: Thu Jun 05, 2008 7:19 pm    Post subject: Reply with quote

redpriest wrote:
I don't see what the huge bugaboo about L3 performance is here. At comparable clock speeds the L3 latency will be the same - there is no difference.


The point here is that clock speeds can't be comparable, since K10 is using significantly lower clock speed for L3 cache (for example, 2.5GHz part runs L3 cache at 2GHz.
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redpriest



Joined: 30 Aug 2007
Posts: 58

PostPosted: Thu Jun 05, 2008 7:40 pm    Post subject: Reply with quote

Actually they are the same; I'm citing core clocks when I quote L3 latency.

What remains to be seen is what the best case latency for Nehalem's L2 and L3 are. The problem with a lot of cache tests are that they're sort of flawed when it comes to determining that. For instance, Penryn has a variable latency L2.
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jack



Joined: 27 Jun 2007
Posts: 359

PostPosted: Thu Jun 05, 2008 7:56 pm    Post subject: Reply with quote

I don't really understand what do you mean by "comparable". If we look at comparable core clocks we will get:
2.5GHz Phenom (L3 running at 2GHz): 21.5ns
2.66GHz Nehalem: 14.6ns

=> Nehalem's latency is clearly better.
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redpriest



Joined: 30 Aug 2007
Posts: 58

PostPosted: Thu Jun 05, 2008 8:38 pm    Post subject: Reply with quote

Anand's measurements are correct but reported in the wrong context.

If the core sees the L3 in 43 cycles, you have to measure the absolute latency in nanoseconds at core clock frequency, and not northbridge clock frequency. The Northbridge clock could be running at 1 mhz, but if the core clock only sees it after 43 core clocks, you don't do the latency measurement using 1 mhz. Is that more of a clear explanation?
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redpriest



Joined: 30 Aug 2007
Posts: 58

PostPosted: Thu Jun 05, 2008 8:41 pm    Post subject: Reply with quote

I am making the bold assumption, of course, that Anand ran the 2.5 ghz frequency part with a 2.0 ghz northbridge.

The correct number would then be 17.2 ns. at 2.66 ghz it would be 16.1 ns. Clearly, 39 < 43 cycles, but again, Barcelona's L3 latency is variable depending on numerous factors including NB clock, core clock, frequency of access, ratio of NB/Core clocks, bypass etc. Best case is < 43 cycles.


Last edited by redpriest on Thu Jun 05, 2008 8:46 pm; edited 1 time in total
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redpriest



Joined: 30 Aug 2007
Posts: 58

PostPosted: Thu Jun 05, 2008 8:46 pm    Post subject: Reply with quote

So in the context of the thread, jumping on AMD for cache performance is not the correct argument to make for saying why Intel is ahead in performance with the Nehalem part - in fact, you should wonder why the cache performance isn't better given Intel's historical cache advantage.

Here's a hint: Having 2 threads access a cache make the latency go longer.
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