Groo wrote:
Everything that was said pointed to the same voltage on every core. It is all the same or off.
-Charlie
The very existence of the huge pass transistor for each core does
open some tantalyzing opportunities for the future.
Consider a core at full speed operation at say 1.2V external core
supply voltage, drawing 20A through the pass transistor with a
50 mV drop. The pass transistor dissipates 1W and the core
dissipates 23W at 1.15V
Now say you add circuitry to implement a linear power regulator
for each core using the pass transistor as the switch. What's the
point you might ask? Won't you simply shift power dissipation
from the core to the pass transistor?
Yes but it isn't a linear, Watt for Watt transfer. Consider running
the core at reduced voltage and frequency, say 0.8V. The pass
transistor has to drop the external supply voltage by 400 mV
but the current isn't 20A any more because the core's power
draw falls roughly as the cube of supply voltage when frequency
is scaled too. From 1.15V to 0.8V implies core power drops to
around 8W or 10A draw. The pass transistor burns 4W doing
its regulator thing but the total core+pass transistor power
draw has fallen from 24W to 12W. Had you simply kept the
core at 1.15V and reduced frequency 30% the total power
draw would be 17W. The linear regulator *saves* 5W when
running the core at reduced frequency. The beauty of this
scheme is it is fully scalable because you still only need one
external VRM to power the device no matter how many cores
it had.
